Ultra-low-voltage-trigger thyristor for on-chip ESD protection without extra process cost

نویسندگان

  • Shan Yi
  • He Jun
  • Huang Wenyi
چکیده

A new thyristor is proposed and realized in the foundry’s 0.18-μm CMOS process for electrostatic discharge (ESD) protection. Without extra mask layers or process steps, the new ultra-low-voltage-trigger thyristor (ULVT thyristor) has a trigger voltage as low as 6.7 V and an ESD robustness exceeding 50 mA/μm, which enables effective ESD protection. Compared with the traditional medium-voltage-trigger thyristor (MVT thyristor), the new structure not only has a lower trigger voltage, but can also provide better ESD protection under both positive and negative ESD zapping conditions.

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تاریخ انتشار 2009